boards: silabs: Add support for Silabs EFR32ZG28 SoC #89597
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Hello @shontal1005, and thank you very much for your first pull request to the Zephyr project! |
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area: Pinctrl
area: Clock Control
platform: Silabs
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this is missing a documentation page
see https://github.com/zephyrproject-rtos/zephyr/blob/76e1fc7713a4a3f2b50c497afddec0364a34c10b/doc/templates/board.tmpl or other SiLabs boards for examples
Thanks!
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The commit is large. Would you mind to split it in two parts (or more)? Maybe one commit for the soc and one commit for the board? BTW, don't this PR require any change on the hal? If yes, you need to update |
dts/arm/silabs/efr32xg28.dtsi
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| compatible = "fixed-factor-clock"; | ||
| clocks = <&lfrco>; | ||
| }; | ||
| wdog0clk: wdog0clk { |
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peripherals need to be disabled in the base dts file, then enabled as-needed by boards
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It seems that on all other platforms the peripherals are not disabled
| config SOC_GECKO_SDID | ||
| default 235 if SOC_SERIES_EFR32ZG28 |
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if this is an existing symbol, put it in Kconfig.defconfig
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I don't understand, it seems like all the other platforms do the same thing as I did
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Then they need to move Kconfig adds new symbols, if you are changing the default of an existing symbol then it goes in Kconfig.defconfig
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@shontal1005, do you want to carry this change or you prefer I open a PR?
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If the change I made is what you meant, I can open another PR.
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Add support for Silicon Labs EFR32ZG28 SoC. Signed-off-by: Shontal Biton <shontal1005@gmail.com>
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Add support for Silicon Labs BRD4401C (a.k.a xG28-RB4401C) Radio Board. Signed-off-by: Shontal Biton <shontal1005@gmail.com>
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FYI: I've created a PR to resolve the CI failure. |
Added support for xg28 in eeprom test. Signed-off-by: Shontal Biton <shontal1005@gmail.com>
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| &dcdc { | ||
| regulator-boot-on; | ||
| regulator-initial-mode = <SILABS_DCDC_MODE_BUCK>; | ||
| silabs,pfmx-peak-current-milliamp = <80>; |
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In SiSDK, the default peak current is set to 100 mA on xG28: https://github.com/SiliconLabs/simplicity_sdk/blob/v2025.6.0/platform/service/device_init/config/s2/sdid235/20dbm/sl_device_init_dcdc_config.h#L54
Is there a reason it's different here?
| }; | ||
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| &hfxo { | ||
| ctune = <106>; |
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In SiSDK, the HFXO tuning value is 115 for this board: https://github.com/SiliconLabs/simplicity_sdk/blob/v2025.6.0/hardware/board/config/brd4401c_brd4002a/sl_device_init_hfxo_config.h#L53
| }; | ||
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| &lfxo { | ||
| ctune = <38>; |
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In SiSDK, the LFXO tuning value is 44 for this board: https://github.com/SiliconLabs/simplicity_sdk/blob/v2025.6.0/hardware/board/config/brd4401c_brd4002a/sl_device_init_lfxo_config.h#L46
| CONFIG_UART_CONSOLE=y | ||
| CONFIG_SERIAL=y | ||
| CONFIG_GPIO=y | ||
| CONFIG_SOC_GECKO_EMU_DCDC=y |
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These two DCDC options aren't used on Series 2, and should be removed.
| status = "disabled"; | ||
| }; | ||
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| gpiod: gpio@5003c0C0 { |
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nit: inconsistent capitalization of the unit address
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| gpiod: gpio@5003c0C0 { | ||
| compatible = "silabs,gecko-gpio-port"; | ||
| reg = <0x5003c0C0 0x30>; |
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nit: inconsistent capitalization of the register address
Adds support for Silicon Labs EFR32ZG28 SoC and BRD4401C Radio Board.